technical data KK74LS164 8-bit serial-input/parallel-output shift register ordering information kk 74ls164n plastic kk 74ls164d soic t a =0 to 7 0 c for all packages thi s 8-bi t shi f t regi st er feat ures gat e d seri al i nput s and an asy n chronous reset . the gat e d seri al i nput s (a and b ) perm i t com p l e t e cont rol over i n com i ng dat a as a l o w at ei t h er (or bot h) i nput (s) i nhi bi t s en try o f th e n e w d a ta an d resets th e first flip flo p to th e lo w lev e l at th e next clock pulse. a high level input enables the other input which will t h en det e rm i n e t h e st at e of t h e fi rst fl i p -fl op. dat a at t h e seri al i nput s m a y be changed whi l e t h e cl ock i s hi gh or l o w, but onl y i n form at i on m eet i ng th e setu p req u i rem e n t s will b e en tered clo c k i n g o ccu rs o r th e lo w-to -h ig h l e vel t r ansi t i on of t h e cl ock i nput . al l i nput s are di ode-cl a m p ed t o m i nim i ze transm ission-line effects. ? gat e d (enabl e/ di sabl e) seri al input s ? ful l y b u ffered c l ock and seri al input s ? asy n chronous c l ear pin assignment function table input s o u t put s reset c lock a1 a2 q a q b ... q h l x x x l l ... l h x x no change h h d d q an ... q gn h d h d q an ... q gn h l l l q an ... q gn d = dat a i nput x = don?t care q an - q gn = dat a shi f t e d from t h e previ ous st age on a ri si ng edge at t h e cl ock i nput . logic diagram pin 14 =v cc pin 7 = gnd 1
KK74LS164 maximum ratings * s y m b o l p a r a m e t e r v a l u e u n i t v cc suppl y vol t a ge 7.0 v v in input vol t a ge 7.0 v v out out put vol t a ge 5.5 v tst g st orage tem p erat ure r a nge -65 t o +150 c * m a xi m u m r a t i ngs are t hose val u es bey ond whi c h dam a ge t o t h e devi ce m a y occur. functional operation should be restricted to the reco m m e nded operating conditions. recommended operating conditions s y m b o l p a r a m e t e r m i n m a x unit v cc suppl y vol t a ge 4.75 5.25 v v ih hi gh level input vol t a ge 2.0 v v il low level input vol t a ge 0.8 v i oh hi gh level out put c u rrent -0.4 m a i ol low level out put c u rrent 8.0 m a t a am bi ent tem p erat ure r a nge 0 +70 c f clock c l ock frequency 0 25 m h z t su set up ti m e , a1 or a2 t o c l ock 15 ns t h hol d ti m e , c l ock t o a1 or a2 5 ns t w pul s e w i dt h, c l ock 20 ns t w pul s e w i dt h, r e set 20 ns t rec r ecovery ti m e 5 ns dc electrical characteristics over full operating conditions g u a r a n t e e d l i m i t s y m b o l p a r a m e t e r t e s t c o n d i t i o n s m i n m a x unit v ik input c l am p vol t a ge v cc = m i n, i in = -18 m a -1.5 v v oh hi gh level out put vol t a ge v cc = m i n, i oh = -0.4 m a 2.7 v v ol low level out put vol t a ge v cc = m i n, i ol = 4 m a 0.4 v v cc = m i n, i ol = 8 m a 0.5 i ih hi gh level input c u rrent v cc = m a x, v in = 2.7 v 20 m a v cc = m a x, v in = 7.0 v 0.1 m a i il low level input c u rrent v cc = m a x, v in = 0.4 v -0.4 m a i o out put short c i rcui t c u rrent v cc = m a x, v o = 0 v (noot e 1) - 2 0 - 1 0 0 m a i cc suppl y c u rrent v cc = m a x (not e 2) 27 m a note 1: not m o re than one output should be shorted at a tim e, and dur ation should not exceed one second. note 2: i cc i s m easured wi t h out put s open, seri al i nput s grouned, t h e cl ock i nput at 2.4 v, and a m o m e nt ary ground, t h en 4.5 v appl i e d. 2
KK74LS164 ac electrical characteristics (t a =25 c, v cc = 5.0 v, c l = 15 pf, r l = 2 k ? , t r =15 ns, t f = 6.0 ns) s y m b o l p a r a m e t e r m i n m a x u n i t t plh propagat i on del a y ti m e , c l ock t o q 27 ns t phl propagat i on del a y ti m e , c l ock t o q 32 ns t phl propagat i on del a y ti m e , r e set t o q 36 ns t su set up ti m e , a1 or a2 t o c l ock 15 ns t h hol d ti m e , c l ock t o a1 or a2 5 ns t w pul s e w i dt h, c l ock 20 ns t w pul s e w i dt h, r e set 20 ns fi gure 1. sw i t chi n g waveforms fi gure 2. sw i t chi n g waveforms notes a. c l i n cl udes probe and ji g capaci t a nce. b . al l di odes are 1n916 or 1n3064. fi gure 3. sw i t chi n g waveform figure 4. test circuit 3
KK74LS164 timing diagram 4
KK74LS164 n s u f f i x p l as t i c di p (m s - 0 0 1 a a ) sy m b o l m i n m a x a 18. 67 19. 69 b 6. 1 7 . 1 1 c 5. 33 d 0. 36 0. 56 f 1. 14 1. 78 g h j 0 10 k 2. 92 3. 81 no t e s : l 7. 62 8. 26 1. d i m e n s i o n s ?a ?, ?b ? d o n o t i n cl u d e m o l d f l as h o r p r o t r u s i o n s . m 0. 2 0 . 3 6 m a x i m u m m o l d f l a s h o r p r o t r u s i o n s 0. 25 m m ( 0 . 010) p e r s i d e . n 0. 38 d su f f i x so i c (m s - 0 1 2 a b ) sy m b o l m i n m a x a 8. 55 8. 75 b 3. 8 4 c 1. 35 1. 75 d 0. 33 0. 51 f 0. 4 1 . 2 7 g h j 0 8 no t e s : k 0. 1 0 . 2 5 1. d i m e n s i o ns a a n d b d o no t i n c l ud e m o l d f l a s h o r p r ot r u s i on . m 0. 19 0. 25 2. m a x i m u m m o l d f l a s h o r p r o t r u s i o n 0. 15 m m ( 0 . 006) p e r s i d e p 5. 8 6 . 2 fo r a ; fo r b ? 0. 25 m m ( 0 . 010) p e r s i d e . r 0. 25 0. 5 d i me n s i o n , mm 1. 27 5. 27 2. 54 7. 62 d i me n s i o n , mm a b h c k c m j f m p g d r x 4 5 se a t i n g pl an e 0.2 5 ( 0 . 0 10 ) m t -t - 1 14 7 8 a b f g d l h se a t i n g pl a n e n k 0.25 ( 0 . 010) m t m j -t - c 1 14 7 8 5
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